The present invention is directed to integrated circuits and their processing for the manufacture of semiconductor devices. More particularly, the invention provides a method and device with selective silicide formation. Merely by way of example, the invention has been applied to complimentary metal oxide semiconductor (CMOS) image sensing. But it would be recognized that the invention has a much broader range of applicability.
Integrated circuits or “ICs” have evolved from a handful of interconnected devices fabricated on a single chip of silicon to millions of devices. Current ICs provide performance and complexity far beyond what was originally imagined. One such type of IC is a CMOS imaging system. The CMOS imaging system can be fabricated on standard silicon production lines and therefore inexpensive to make. Additionally, the CMOS image sensor consumes low power and especially suitable for portable applications.
Specifically, a CMOS image system converts a light signal into an electrical signal, whose intensity is related to the light intensity. FIG. 1 is a simplified diagram for a conventional CMOS imaging system 100. System 100 is configured into two regions, a photo-sensing region 110 and a periphery region 120. In photo-sensing region 110, an array of CMOS image sensors are organized in rows and columns to detect light intensity. Circuits providing additionally functions are disposed in periphery region 120. For example, periphery region 120 can include signal amplification circuits, analog-to-digital converters, image signal processor, or a digital signal processor.
FIG. 2 is a simplified circuit diagram of a CMOS image sensor. The CMOS image sensor 200 corresponds to one pixel and includes a reset transistor 210, a photodiode 220, a source follower 230, a selecting transistor 240, and a bias resistor 250. The photodiode 220 receives a light signal and generates a photocurrent from a node 260 to a node 262. Additionally, a leakage current also flows through the photodiode 220 in the same direction. This leakage current is sometimes referred to as dark current of the CMOS image sensor. One source for the leakage current is the source region of the reset transistor 210, which is connected to the photodiode 220. A large leakage current adversely affects the performance of the CMOS image sensor.
In a CMOS device, including a CMOS imaging system, salicide can be used to improve RC delay. However, a conventional salicide process has certain limitations when applied to a CMOS image system. The formation of silicide in most areas of the photo sensing region of the CMOS image sensor (such as photodector diode areas and source/drain regions in photo sensing area) generally increases leakage current, and thus degrades sensor image quality.
Accordingly, a conventional silicide block technique using a photo process has been proposed. Unfortunately, this technique typically does not have the requisite alignment accuracy. It generally does not provide consistent control for selective growth of silicide. That is to say, it is difficult to form silicide on a polysilicon gate in the photo-sensing region without forming unwanted silicide on other areas of the photo-sensing region. Another conventional approach is an etch back process to remove silicide from the source/drain regions of the photo-sensing area to selectively form suicide on a gate. However, the etch back process is often difficult to control and reduces production yield.
From the above, it is seen that an improved technique for a CMOS image sensor is desired.